Video Timings: VGA, SVGA, 720P, 1080P

Welcome to the FPGA Cookbook.

This is part of a new series of handy recipes to solve common FPGA development problems. Find more FPGA and Verilog recipes see the Time to Explore FPGA Index.

You Need Video Timings

To work with standard monitors and TVs you need to use the correct video timings. This recipe includes the timings for four common modes using analogue VGA, DVI, or HDMI: 640x480, 800x600, 1280x720, and 1920x1080 all at 60 Hz.

CRT monitors typically support higher refresh rates in addition to 60 Hz, such as 72 and 85 Hz, but most LCD monitors do not. There are an increasing number of high-end televisions and monitors for gamers that do support higher refresh rates, but these are beyond the scope of this guide.

These data were last updated in January 2019. Feedback to @WillFlux is most welcome.

Video Signals in Brief

Video signals have two phases: drawing pixels and the blanking interval. The sync signals occur within blanking intervals; separated from pixel drawing by the front porch and back porch. Horizontal sync demarcates a line and vertical sync a frame. The following diagram illustrates the different parts of the display signal for 640x480 at 60Hz; the HD resolutions work in a similar way.

NB. The timing values shown in this diagram are not ideal; use those from from the 640x480 entry, below.

Video Timings

Video timings are a complex area with several different specifications, for example VESA Coordinated Video Timings (CVT) includes four variants for common HD resolutions. This document won't go into all the variants; instead we provide conservative timings that should work with all displays. These timings are based on VESA DMT v1.3 (available from vesa.org) and CTA-861-G (available from cta.tech). Other data, such as bandwidths and memory requirements, were calculated by the author (Will Green).

The frame memory values show how many kilobits (NOT bytes) of memory you need to store a single frame; 12-bit per pixel equates to 4:2:0 Y'CrCb. The data rate is the required bandwidth for 24 bits-per-pixel with the included timings. DVI & HDMI use TMDS encoding: the TMDS clock shown is for regular 24-bit colour, higher colour depths require higher clocks.

VIC is the Video Identification (ID) Code used in EDID. Look out for a post on EDID in future.

VGA 640x480 60 Hz

The classic VGA display that works with analogue VGA monitors as well as well as modern HD displays and televisions. I recommend starting with this resolution when developing new display logic; it's almost foolproof and requires lower clock speeds than HD resolutions.

With analogue VGA monitors you can usually get away with using a 25 MHz pixel clock. However, based on the VESA tolerance of 0.5%, 25 MHz is not acceptable and displays may reject it. Note that 25.2 MHz is considered acceptable by VESA, which gives a 60 Hz refresh rate (rather than 59.940 Hz).

FPGA VGA Graphics in Verilog Part 1 includes a Verilog design using this display mode.

Name          640x480p60
Standard      Historical
VIC                    1
Short Name       DMT0659
Aspect Ratio         4:3

Pixel Clock       25.175 MHz
TMDS Clock       251.750 MHz
Pixel Time          39.7 ns ±0.5%
Horizontal Freq.  31.469 kHz
Line Time           31.8 μs
Verical Freq.     59.940 Hz
Frame Time          16.7 ms

Horizontal Timings
Active Pixels        640
Front Porch           16
Sync Width            96
Back Porch            48
Blanking Total       160
Total Pixels         800
Sync Polarity        neg

Vertical Timings
Active Lines         480
Front Porch           10
Sync Width             2
Back Porch            33
Blanking Total        45
Total Lines          525
Sync Polarity        neg

Active Pixels    307,200 
Data Rate           0.60 Gbps

Frame Memory (Kbits)
 8-bit Memory      2,400
12-bit Memory      3,600
24-bit Memory      7,200
32-bit Memory      9,600

Porch times shown include the border times referenced in VESA DMT.

SVGA 800x600 60 Hz

800x600, or SVGA, offers a little over 50% more pixels than 640x480. The pixel clock for 800x600 at 60 Hz is exactly 40 MHz. FPGA VGA Graphics in Verilog Part 1 includes a Verilog design using this display mode.

Name          800x600p60
Standard        VESA DMT
VIC                  N/A
Short Name           N/A
Aspect Ratio         4:3

Pixel Clock       40.000 MHz
TMDS Clock       400.000 MHz
Pixel Time          25.0 ns ±0.5%
Horizontal Freq.  37.897 kHz
Line Time           26.4 μs
Vertical Freq.    60.317 Hz
Frame Time          16.6 ms

Horizontal Timings
Active Pixels        800
Front Porch           40
Sync Width           128 
Back Porch            88
Blanking Total       256
Total Pixels        1056
Sync Polarity        pos

Vertical Timings
Active Lines         600
Front Porch            1
Sync Width             4
Back Porch            23
Blanking Total        28
Total Lines          628
Sync Polarity        pos

Active Pixels    480,000
Data Rate           0.90 Gbps

Frame Memory (Kbits)
 8-bit Memory      3,750
12-bit Memory      5,625
24-bit Memory     11,250
32-bit Memory     15,000

HD 1280x720 60 Hz

The lowest of the common HD resolutions, 720P is widely supported and has relatively modest bandwidth requirements: an 8-bit 720P display requires less than 8 Mbits per frame. Note how the pixel clock of 720P is half that of 1080P (below): this simplifies your design if you need to support both resolutions.

Name         1280x720p60 
Standard       CTA-770.3
VIC                    4
Short Name          720p
Aspect Ratio        16:9

Pixel Clock       74.250 MHz
TMDS Clock       742.500 MHz
Pixel Time          13.5 ns ±0.5%
Horizontal Freq.  45.000 kHz
Line Time           22.2 μs
Vertical Freq.    60.000 Hz
Frame Time          16.7 ms

Horizontal Timings
Active Pixels       1280
Front Porch          110
Sync Width            40
Back Porch           220
Blanking Total       370
Total Pixels        1650
Sync Polarity        pos

Vertical Timings
Active Lines         720
Front Porch            5
Sync Width             5
Back Porch            20
Blanking Total        30
Total Lines          750
Sync Polarity        pos

Active Pixels    921,600
Data Rate           1.78 Gbps

Frame Memory (Kbits)
 8-bit Memory      7,200
12-bit Memory     10,800
24-bit Memory     21,600 
32-bit Memory     28,800

HD 1920x1080 60 Hz

The 1080P HDMI television or monitor has been the dominant specification for some years. If you're only going to support one resolution then 1920x1080 is a solid choice. However, you should bear in mind that the TMDS clock is almost 1.5 GHz, which is demanding for normal FPGA I/O. A full 32-bit 1080P display requires just under 64 Mbits per frame.

Name        1920x1080p60 
Standard      SMPTE 274M
VIC                   16
Short Name         1080p
Aspect Ratio        16:9

Pixel Clock        148.5 MHz
TMDS Clock       1,485.0 MHz
Pixel Time           6.7 ns ±0.5%
Horizontal Freq.  67.500 kHz
Line Time           14.8 μs
Vertical Freq.    60.000 Hz
Frame Time          16.7 ms

Horizontal Timings
Active Pixels       1920
Front Porch           88
Sync Width            44
Back Porch           148
Blanking Total       280
Total Pixels        2200
Sync Polarity        pos

Vertical Timings
Active Lines        1080
Front Porch            4
Sync Width             5
Back Porch            36
Blanking Total        45
Total Lines         1125
Sync Polarity        pos

Active Pixels  2,073,600
Data Rate           3.56 Gbps

Frame Memory (Kbits)
 8-bit Memory     16,200
12-bit Memory     24,300
24-bit Memory     48,600
32-bit Memory     64,800

What about 4K?

The author doesn't (yet) have 4K-capable displays or FPGA boards, so hasn't tested timings for 4096×2160 (DCI 4K), or 3840x2160 (4K UHD). Sorry.

©2018-2019 Will Green.